]> pilppa.com Git - linux-2.6-omap-h63xx.git/commit
[ARM] 3256/1: Make the function-returning ldm's use sp as the base register
authorCatalin Marinas <catalin.marinas@arm.com>
Thu, 12 Jan 2006 16:53:51 +0000 (16:53 +0000)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Thu, 12 Jan 2006 16:53:51 +0000 (16:53 +0000)
commit90303b102353302e84758f245906368907e6a23b
tree3e417666985ee5875c2d3435518de2c4bdc9b88d
parentece5f7b3c4fde70a1ae4add7372ebca5c90bc34d
[ARM] 3256/1: Make the function-returning ldm's use sp as the base register

Patch from Catalin Marinas

If the low interrupt latency mode is enabled for the CPU (from ARMv6
onwards), the ldm/stm instructions are no longer atomic. An ldm instruction
restoring the sp and pc registers can be interrupted immediately after sp
was updated but before the pc. If this happens, the CPU restores the base
register to the value before the ldm instruction but if the base register
is not sp, the interrupt routine will corrupt the stack and the restarted
ldm instruction will load garbage.

Note that future ARM cores might always run in the low interrupt latency
mode.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/kernel/fiq.c
arch/arm/lib/csumpartialcopy.S
arch/arm/lib/csumpartialcopygeneric.S
arch/arm/lib/csumpartialcopyuser.S